DIU-BLC
Digital Electronics Lab (Summer 20)
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Assignment 2
Welcome to Digital Electronics Lab
Announcements
Announcements
Let's Started
Week 1: Basic Logic Gate
Reference Video Tutorial
Discussion on week 1
Logic gate
Week 2: Universal Logic Gate
Assignment 2
Week 3: Parity Generator & Checker Demorgan's Law
Lab 3
Lab 4
Week 4: Assessment 1
Week 5: Half Adder
Sample project Idea
Half Adder
Week 6: Full Adder
Video Tutorial
Full Adder
Week 7: Mid Term Exam
Week 8: Decoder
Week 9: Encoder
Encoder and Priority encoder
Week 10: Assessment 2
Week 11: Multiplexer
Week 12: SR Latch
Week 13: Lab Final
Week 14: Final Exam
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Course Overview
Sections
Welcome to Digital Electronics Lab
1
Announcements
Forum
Announcements
Forum
Let's Started
2
Week 1: Basic Logic Gate
3
Reference Video Tutorial
URL
Discussion on week 1
Forum
Logic gate
Assignment
Week 2: Universal Logic Gate
4
Assignment 2
Week 3: Parity Generator & Checker Demorgan's Law
5
Lab 3
Assignment
Lab 4
Assignment
Week 4: Assessment 1
6
Week 5: Half Adder
7
Sample project Idea
URL
Half Adder
Assignment
Week 6: Full Adder
8
Video Tutorial
URL
Full Adder
Assignment
Week 7: Mid Term Exam
9
Week 8: Decoder
10
Week 9: Encoder
11
Encoder and Priority encoder
Assignment
Week 10: Assessment 2
12
Week 11: Multiplexer
13
Week 12: SR Latch
14
Week 13: Lab Final
15
Week 14: Final Exam
16
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Digital Electronics Lab (Summer 20)
Home
Courses
DIU
Faculty of Science and Information Technology
Computer Science and Engineering
CSE Summer 20
CSE224 (AAK-202)
Week 2: Universal Logic Gate
Assignment 2
Assignment 2
Opened:
Sunday, 14 June 2020, 12:00 AM
Due:
Sunday, 21 June 2020, 12:00 AM
Mark as done
Previous Activity
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Announcements
Announcements
Reference Video Tutorial
Discussion on week 1
Logic gate
Lab 3
Lab 4
Sample project Idea
Half Adder
Video Tutorial
Full Adder
Encoder and Priority encoder
Next Activity