Topic outline

  • General

    • Lecture Module-01: Introduction



      A.H.M Shahariar Parvez

      Associate Professor
      Department of Software Engineering, FSIT
      Daffodil International University
      Email: shahariar.swe@diu.edu.bd
      Web Profile:https://faculty.daffodilvarsity.edu.bd/profile/swe/shahariar.html


      Welcome Note:

      On behalf of the Department of Software Engineering, as a course instructor, I would like to welcome you all to this course titled "Digital Electronics and Logic Design". Digital Electronics is the study of electronic circuits that are used to process and control digital signals. In contrast to analog electronics, where information is represented by a continuously varying voltage, digital signals are represented by two discreet voltages or logic levels. This distinction allows for greater signal speed and storage capabilities and has revolutionized the world electronics. Digital electronics is the foundation of all modern electronic devices such as cellular phones, MP3 players, laptop computers, digital cameras, high definition televisions, etc. The major focus of the DE course is to expose students to the design process of computational and sequential logic design, engineering standards, and technical documentation.

      Instructions/Guideline for the course:

        • All the students registered for this course have to enroll in BLC with access key
        • Students can find all the course materials from BLC.
        • All the students have to submit the soft copy of their "Assignment" and "Quiz" and "Presentation" in BLC under  assignment section created here and for this they will be graded here.
        • Any lesson engaging activities like discussion, feedback, chat box, reflections or any other built in features from BLC created under each or any lecture may contain marks, therefore, students are advised to be notified.

      Disclaimer:

      While every effort has been made to ensure that the information contained in this document is accurate, the information is subject to change. Changes will be notified in class and/or tutorials, via whatsapp or email. Students are encouraged to check BLC or email for any changes. It is your responsibility to be informed.

    • Lecture Module-02: Number Systems & Conversion



      Lecture Module-02: Summery
      Lecture Brief: 
      There are infinite ways to represent a number. The four commonly associated with modern computers and digital electronics are: decimal, binary, octal, and hexadecimal.
      Lecture Objectives:
              To learn converting number from one base to another
              To learn the usefulness of any particular number system
      Lecture Outcome:
              To be able to covert number from one base to another
              To be able to use any particular number system

    • Lecture Module-03: Binary Addition



      Lecture Module-03: Summery

      Lecture Brief:

      Binary addition calculations work in the same way, except that only 0's and 1's can be used, instead of the whole spectrum of 0-9. 
      Lecture Objectives: 
      To learn the methods of adding positive and negative binary numbers
      To learn the method of adding BCD numbers
      Lecture Outcomes:
      To be able to perform binary addition 
      To be able to perform BCD addition

    • Lecture Module-04: Logic Gate & Universal Gate



      Lecture Module-04: Summery

      Lecture Brief: 

      A logic gate is an idealized or physical electronic device implementing a Boolean function, a logical operation performed on one or more binary inputs that produces a single binary output. A universal logic gate is a logic gate that can be used to construct all other logic gates.
      Lecture Objectives:
      To learn logic gates and, their graphical symbol and function
      To learn universal gates along with it's properties
      Lecture Outcomes:
      To be ale to identify, draw logic gates
      To be able to express logic gates with functions and Truth Table
      To be able to understand universal properties of NAND & NOR gates

    • Lecture Module-05: Boolean Algebra



      Lecture Module-05: Summery

      Lecture Brief: 

      Boolean algebra is the branch of algebra in which the values of the variables are the truth values true and false, usually denoted 1 and 0 respectively. A set of rules or Laws of Boolean Algebra expressions have been invented to help reduce the number of logic gates needed to perform a particular logic operation resulting in a list of functions or theorems known commonly as the Laws of Boolean Algebra.

      Lecture Objectives:

      To learn boolean operation, functions and algebraic manipulation
      To learn basic theorems and properties of boolean algebra
      To learn boolean expression simplification, circuit diagram and proof using truth table

      Lecture Outcomes:

      To be able to perform boolean operation, algebraic manipulation
      To be able to simplify expression using basic theorems and properties of boolean algebra
      To be able to draw circuit from any boolean expression


    • Lecture Module-06: Binary Adder



      Lecture Module-06: Summery

      Lecture Brief:

      An adder is a digital logic circuit in electronics that implements addition of numbers. In many computers and other types of processors, adders are used to calculate addresses, similar operations and table indices in the ALU (Arithmetic Logic Unit) and also in other parts of the processors. 

      Lecture Objectives: 

      To learn the functionality of adder circuits
      To learn how adder operation is done using different adder circuit

      Lecture Outcomes:

      To be able to prepare different adder equation and circuits
      To be able to design full adder from half adder
      To be able to use cascaded full adders for parallel adder

    • Lecture Module-07: K-Map & Simplification




      Lecture Module-07: Summery

      Lecture Brief:

      K-map is table like representation but it gives more information than TRUTH TABLE. We fill grid of K-map with 0's and 1's then solve it by making groups. The short form of the sum of the product is SOP, and it is one kind of Boolean algebra expression. In this, the different product inputs are being added together. The min-term can be defined as, when the minimum combinations of inputs are high then the output will be high. 

      Lecture Objectives:

      To learn about SOP, min-terms and K-Map
      To understood simplification of Boolean expression using K-Map

      Lecture Outcomes: 

      To be able to learn preparing SOP, min-term, and K-Map
      To be able to use K-Map for for simplification of any expression 

    • Mid-Term Examination




      Mid Exam Syllabus: Summery

      Syllabus Contents: 

      Lecture Module 01
      Lecture Module 02
      Lecture Module 03
      Lecture Module 04
      Lecture Module 05
      Lecture Module 06
      Lecture Module 07

      Examination Procedure:

      Exam will be held on March following the guidelines and policy set by DIU Exam Committee

      Results & Grading:

      DIU grading policy and mark distribution will be followed

      • Lecture Module-08: Encoder & Decoder




        Lecture Module-08: Summery

        Lecture Brief: 

        An encoder is a combinational circuit that converts binary information in the form of a 2n input lines into n output lines, which represent n bit code for the input. For simple encoders, it is assumed that only one input line is active at a time. A decoder does the opposite job of an encoder. It is a combinational circuit that converts n lines of input into 2n lines of output.

        Lecture Objectives: 

        To learn about encoder, its application, expression and circuit diagram
        To learn about decoder, its application, expression and circuit diagram

        Lecture Outcomes: 

        To be able to prepare different simple encoder circuit
        To be able to prepare different simple decoder circuit
        To be able to prepare number systems conversion encoders including BCD to XS3 

      • Lecture Module-09: Multiplexer & Demultiplexer




        Lecture Module-09: Summery

        Lecture Brief: 

        Multiplexer is a device that has multiple inputs and a single line output. The select lines determine which input is connected to the output, and also to increase the amount of data that can be sent over a network within certain time. De-multiplexer is also a device with one input and multiple output lines. It is used to send a signal to one of the many devices. 

        Lecture Objectives: 

        To learn operation, expression and circuit of multiplexer
        To learn operation, expression and circuit of multiplexer
        To learn to prepare circuit for any boolean expression using multiplexer 

        Lecture Outcomes: 

        To be able to prepare different simple multiplexer circuits
        To be able to prepare different simple de-multiplexer circuit
        To be able to draw circuit for any boolean expression using multiplexer 
      • This topic

        Lecture Module-10: Parity Generator & Checker




        Lecture Module-10: Summery

        Lecture Brief: 

        The parity generating technique is one of the most widely used error detection techniques for the data transmission. In digital systems, when binary data is transmitted and processed , data may be subjected to noise so that such noise can alter 0s (of data bits) to 1s and 1s to 0s. A parity generator is a combinational logic circuit that generates the parity bit in the transmitter. On the other hand, a circuit that checks the parity in the receiver is called parity checker.

        Lecture Objective: 

        To learn the preparation of even and odd parity generation and checker circuits  

        Lecture Outcomes:

        To be able to prepare even parity generator and checker circuit
        To be able to prepare odd parity generator and checker circuit
        To be able to decide and apply specific parity for data transmission

      • Final Examination




        Final Exam Syllabus: Summery

        Syllabus Contents: 

        Lecture Module 07
        Lecture Module 08
        Lecture Module 09
        Lecture Module 10

        Examination Procedure: 

        Exam will be held as per the guidelines and policy set by DIU Exam Committee

        Results & Grading:

        DIU grading policy and mark distribution will be followed

        • Discussion Forum: Final Syllabus
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          Discussion relating the contents for Final Exam Syllabus will be done here. A pdf file of syllabus summary is also added. 

        • Assignment
          View Make a submission

          Solve the following problem. 

          Prepare an ODD PARITY "Generator" and "Checker" circuit with truth tables, equations and circuit diagrams. Consider that you would like to send "three bits" for data and "one bit" for parity. 

          Prepare your answer on papers by pen and pencil and remember to write down your ID on the top right corner of each page. 

          Take pictures of each page and combine the pictures into a single pdf file, if possible or necessary, compress the pdf so that the file size remains within 10MB.

          Upload the file here within the deadline which is 3:00PM on December 27, 2022.

        • Presentation: End of Course Presentation Assignment
          View Make a submission

          Please read carefully the instructions attached bellow as a pdf file. Deadline for submission is 03:00PM on December 27, 2022.