Section outline

    • Topics for Week 2

      Lab Task 2 

      ·    Universality of NAND and NOR gates, an implementation using universal gates.

      Expected Outcome:

      ·    Able to implement the logic circuit using universal gates.


      Book Chapter:

      ·   Chapter 2, Digital Logic Design –By  Morris Mano.
    • Students must
      Mark as done

      Lab Tutorials

      1. Implementation of OR gate and match the truth table using Tinkercad    [Click Here]

      2. Implementation of AND gate match the truth table using Tinkercad    [Click Here]


    • Students must
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      Guidelines for Students

      • The students must take part in the class with full attention
      • Go through the provided material first
      • Then open the class recordings if you have any confusion
      • Students must write in the forum to discuss about the classes

    • forum icon
      Discussion Forum: Lesson wise Feedback
      Students must
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    • Students must
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      Class Recordings of Week 2

    • Section O12

      Pre-Discussion    [Click Here]

      Post Discussion    [Click Here]

      Not available unless: You belong to Section O12

    • Section O13

      Lecture 2 Complete    [Click Here]


      Not available unless: You belong to Section o13
    • Students must
      Mark as done

      Assessment using Interactive Content (H5P)

    • hvp icon
      Assessment using H5P Content Interactive Content
      Students must
      Mark as done
    • assign icon
      Assignment 1
      Students must
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