Section outline

  • Welcome Letter & Video Message

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    Click to View the Welcome Video Message for the Students

    Dear Students,

    Welcome to the course Digital Electronics Lab (CSE 224). In this COVID-19 situation we all are facing continuous challenges in our life. And we are here together in this pandemic. As the classes will be taken online, we all must come forward for each other. Happy Learning everyone!



  • Let's Started

    • Instructor Name: A S M Farhan Al Haque

      Email: Farhan.cse@diu.edu.bd
      Office Address: Room-503, CSE Building, Daffodil International University


      Course Rationale

      Digital Electronics Lab is helpful for the students to acquire the basic knowledge of digital logic levels and its application to construct digital electronics circuits. This course will prepare students to perform the analysis and design of various digital electronic circuits.

      Course Objective

      This course will enable a student to have a thorough understanding of the fundamental concepts and techniques used in digital electronics. It will also help the students to understand and examine the structure of various number systems and its application in digital design. The student can analyse and design various combinational and sequential circuits in this lab.

      Course Outcomes (CO’s)

      CO1

      Basic knowledge on logic gate implementation and get familiar with IC.

      CO2

      Understanding different combinational circuits and design circuits.

      CO3

      Able to solve problem using sequential circuit and logic design.

      Grading Scheme

      Attendance: 10
      Lab Report : 20%
      Lab Performance: 30%
      Final Exam (Project + Project Report): 40%

      Textbook

      1. Digital Systems-Principles and Application- Tocci (10th Edition)

      2. Digital Fundamentals- Floyd(8th Edition)

      Reference Books

      1. Digital Logic Design – Morris Mano (5th Edition)

      Necessary Course Materials

    • Course Outline

    • Lab Manual

    • Online Simulator

  • Week 1: Basic Logic Gate

    • Topics for Week 1

      Lab Task 1 

      ·   Get familiar with IC.
      .   Introduction to Basic Logic gates.

      Expected Outcome:

      ·    Able to implement the basic logic circuit using basic logic gates.


      Book Chapter:

      ·   Chapter 2, Digital Logic Design –By  Morris Mano.
    • url icon
      Reference Video Tutorial URL
    • forum icon
      Discussion Forum: Lesson wise Feedback
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    • Students must
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      Class Recording    [Click Here]

    • Students must
      Mark as done

      Guidelines for Students

      • The students must take part in the class with full attention
      • Go through the provided material first
      • Then open the class recordings if you have any confusion
      • Students must write in the forum to discuss about the classes

  • Week 2: Universal Logic Gate

    • Topics for Week 2

      Lab Task 2 

      ·    Universality of NAND and NOR gates, an implementation using universal gates.

      Expected Outcome:

      ·    Able to implement the logic circuit using universal gates.


      Book Chapter:

      ·   Chapter 2, Digital Logic Design –By  Morris Mano.
    • Students must
      Mark as done

      Lab Tutorials

      1. Implementation of OR gate and match the truth table using Tinkercad    [Click Here]

      2. Implementation of AND gate match the truth table using Tinkercad    [Click Here]


    • Students must
      Mark as done

      Guidelines for Students

      • The students must take part in the class with full attention
      • Go through the provided material first
      • Then open the class recordings if you have any confusion
      • Students must write in the forum to discuss about the classes

    • forum icon
      Discussion Forum: Lesson wise Feedback
      Students must
      Mark as done
    • Students must
      Mark as done

      Class Recordings of Week 2

    • Section O12

      Pre-Discussion    [Click Here]

      Post Discussion    [Click Here]

      Not available unless: You belong to Section O12

    • Section O13

      Lecture 2 Complete    [Click Here]


      Not available unless: You belong to Section o13
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      Mark as done

      Assessment using Interactive Content (H5P)

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      Assessment using H5P Content Interactive Content
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    • assign icon
      Assignment 1
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  • Week 3: Implementation of Logic circuits

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      Topic of Discussion

      • Implement the logic circuit of function F = AB+BC
      • Prove the universality of NAND and NOR gate using the function
      Expected Learnning Outcome
      To learn how to implement the logic circuits using TINKERCAD

    • forum icon
      Discussion Forum: Lesson wise Feedback
      Not available unless: You belong to any group
    • Students must
      Mark as done

      Guidelines for Students

      • The students must take part in the class with full attention
      • Go through the provided material first
      • Then open the class recordings if you have any confusion
      • Students must write in the forum to discuss about the classes

    • Students must
      Mark as done

      Class Recordings of Week 3

    • Section O12

      Lecture 3 Complete    [Click Here]

      Not available unless: You belong to Section O12

    • Section O13

      Lecture 3   [Click Here]
      Not available unless: You belong to Section o13
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      Student Feedback using Questionnaire

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      Lab Quiz

    • quiz icon
      Lab Quiz on Logic Circuits
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  • Week 4: Parity Generator & Checker

    • Topics for Week 3

      Lab Task 3

      ·    XOR, XNOR Gates
      .    Parity Generator and parity Checker Circuits

      Expected Outcome:

      ·    Able to implement the XOR, XNOR Gates, Parity Generator and parity Checker Circuits


      Book Chapter:

      ·   Chapter 2, Digital Logic Design –By  Morris Mano.

    • Class Recordings of Lab 4

      Lecture 4 Complete    [Click Here]

      Not available unless: You belong to Section O12
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      Forum: Lessonwise Feedback
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  • Week 4: Assessment 1

    • 1. Boolean function to Logic gate
      2. Implement Universal Gate using basic gate 
      3. Parity Generator

  • Week 5: Half Adder

    • Topics for Week 5

      Lab Task 5

      ·    Half-adder Circuits Using Basic Logic Gates

      Expected Outcome:

      ·    Able to implement half adder 


      Book Chapter:

      ·   Chapter 4, Digital Logic Design –By  Morris Mano.
    • url icon
      Sample project Idea URL
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      Forum: Lessonwise Feedback
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  • Week 6: Full Adder

    • Topics for Week 6

      Lab Task 6

      ·    Full-adder Circuits Using Basic Logic Gates 
      .    4 Bit binary Adder

      Expected Outcome:

      ·    Able to implement Full adder 
      .    Able to implement binary adder


      Book Chapter:

      ·   Chapter 4, Digital Logic Design –By  Morris Mano.
    • url icon
      Video Tutorial URL

    • Submit Your Lab Project Idea 


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      Forum: Lessonwise Feedback
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  • Week 7: Mid Term Exam


  • Week 8: Decoder

    • Topics for Week 8

      Lab Task 8

      ·    Design and Implementation of Decoder Circuits Using Logic Gates

      .    Half adder and Full adder from decoder

      Expected Outcome:

      ·    Able to implement Full adder from decoder
      .    Exercise on decoder


      Book Chapter:

      ·   Chapter 4, Digital Logic Design –By  Morris Mano.

  • Week 9: Encoder

    • Topics for Week 9

      Lab Task  9

      ·    Design and Implementation of a Encoder Using Basic Logic Gates

      Expected Outcome:

      .    Exercise on encoder


      Book Chapter:

      ·   Chapter 4, Digital Logic Design –By  Morris Mano.
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      Forum: Lessonwise Feedback
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      Mark as done

  • Week 10: Assessment 2

    • 1. Implement Decoder 
      2. Full adder from Decoder
      3. Implement Encoder

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      Forum: Lessonwise Feedback
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  • Week 11: Multiplexer

    • Topics for Week 11

      Lab Task  11

      ·    Design and Implementation of Multiplexers

      .    Implement Multiplexer from boolean expression

      Expected Outcome:

      .    Able to implement Multiplexer


      Book Chapter:

      ·   Chapter 4, Digital Logic Design –By  Morris Mano.
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      Forum: Lessonwise Feedback
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  • Week 12: SR Latch

    • Topics for Week 12

      Lab Task  12

      ·    Realization of SR Latch Using Integrated Circuit NAND and NOR Gates

      Expected Outcome:

      .    Able to implement sequential circuit


      Book Chapter:

      ·   Chapter 4, Digital Logic Design –By  Morris Mano.
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      Forum: Lessonwise Feedback
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  • Week 13: Lab Final


    • Lab Final

      1. Project 
      2. Project Report
      3. Presentation

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      Forum: Lessonwise Feedback
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  • Week 14: Final Exam