Section outline

  • Welcome to Digital Electronics Lab

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    Dear CSE224 Students,

    Welcome to Digital Electronics Course Lab (CSE224). I am Nusrat Jahan, Senior Lecturer, Department of Computer Science and Engineering (CSE) and I am your instructor in this course. In addition to welcoming you to the course, I would like to say "Online courses provide a different way to study and place different skills from students". I will provide you the necessary support during the course to successfully complete this course.

    Thank you and good luck 

  • Let's Started


    • Instructor Name: Amir Sohel

      Email: amir.cse@diu.edu.bd
      Phone: 01688752572
      Office Address: Room-317, AB4, Daffodil International University


      Course Rationale

      Digital Electronics Lab is helpful for the students to acquire the basic knowledge of digital logic levels and its application to construct digital electronics circuits. This course will prepare students to perform the analysis and design of various digital electronic circuits.

      Course Objective

      This course will enable a student to have a thorough understanding of the fundamental concepts and techniques used in digital electronics. It will also help the students to understand and examine the structure of various number systems and its application in digital design. The student can analyse and design various combinational and sequential circuits in this lab.

      Course Outcomes (CO’s)

      CO1

      Basic knowledge on logic gate implementation and get familiar with IC.

      CO2

      Understanding different combinational circuits and design circuits.

      CO3

      Able to solve problem using sequential circuit and logic design.

      Grading Scheme

      Attendance: 10
      Lab Report (Assignment + Viva) : 25%
      Lab Performance (Assignment + Viva): 25%
      Final Exam (Project + Project Report): 40%

      (Attendance: will be based on class attendance and weekly feedback; 
      Class Test: will be based on BLC online Test;
      Assignment and Presentation: Based on individual work;
      Mid and Final Exam: Open book, case studies;)

      Academic Honesty

      1. Ensure Plagiarism <15%.
      2. Reflect Self Understanding.
      3. Avoid all unfair means to ensure growth of your positive mindset.


      Textbook

      1. Digital Systems-Principles and Application- Tocci (10th Edition)

      2. Digital Fundamentals- Floyd(8th Edition)

      Reference Books

      1. Digital Logic Design – Morris Mano (5th Edition)


    • Students must
      Mark as done

      Course Outline

    • Students must
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      Lab Manual
    • Students must
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      Online Simulator 1


    • Students must
      Mark as done

      Quick Access

      Assignment_1                                               

      Viva_1                                                 
      Assignment_2 Viva_2

      Final Project

      Report


      Week: WK1, WK2, WK3, WK4, WK5, WK6, WK7, WK8, WK9, WK10, WK11, WK12, WK13, WK14


  • Week 1: Basic Logic Gate


    • Students must
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      Week 1: Introduction

      Lab Task 1 

      ·   Get familiar with IC.
      .    Introduction to Basic Logic gates.

      Expected Outcome:

      ·    Able to implement the basic logic circuit using basic logic gates.


      Book Chapter:

      ·   Chapter 2, Digital Logic Design –By  Morris Mano.
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      Submit lab report Assignment
      Opened: Saturday, 30 July 2022, 12:00 AM
      Due: Saturday, 6 August 2022, 12:00 AM
      Students must
      View
      Make a submission

  • Week 2: Universal Logic Gate


    • Students must
      Mark as done

      Week 2: Universal Logic Gate


      Topics for Week 2

      Lab Task 2 

      ·    Universality of NAND and NOR gates, an implementation using universal gates.

      Expected Outcome:

      ·    Able to implement the logic circuit using universal gates.


      Book Chapter:

      ·   Chapter 2, Digital Logic Design –By  Morris Mano.
    • Students must
      Mark as done

      Lecture Video 2

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      Lab report 2 submission Assignment
      Opened: Wednesday, 17 August 2022, 12:00 AM
      Due: Wednesday, 24 August 2022, 12:00 AM
      Students must
      View
      Make a submission

  • Week 3: Parity Generator & Checker


    • Students must
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      Week 3: Parity Bit Generator


      Topics for Week 3

      Lab Task 3

      ·    XOR, XNOR Gates
       .    Parity Generator and parity Checker Circuits

      Expected Outcome:

      ·    Able to implement the XOR, XNOR Gates, Parity Generator and parity Checker Circuits


      Book Chapter:

      ·   Chapter 2, Digital Logic Design –By  Morris Mano.
    • Students must
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      Lecture Video On:

      Implement a Circuit using OR gate. 


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      Lab report 3 submission Assignment
      Opened: Wednesday, 17 August 2022, 12:00 AM
      Due: Wednesday, 24 August 2022, 12:00 AM
      Students must
      View
      Make a submission

  • Week 4: Assessment 1


  • Week 5: Half Adder


    • Students must
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      Week 5: Half Adder


      Topics for Week 5

      Lab Task 5

      ·    Half-adder Circuits Using Basic Logic Gates

      Expected Outcome:

      ·    Able to implement half adder 


      Book Chapter:

      ·   Chapter 4, Digital Logic Design –By  Morris Mano.
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      Lab report submission Assignment
      Opened: Saturday, 3 September 2022, 12:00 AM
      Due: Saturday, 10 September 2022, 12:00 AM
      Students must
      View
      Make a submission

  • Week 6: Full Adder



    • Week 6: Full Adder


      Topics for Week 6

      Lab Task 6

      ·    Full-adder Circuits Using Basic Logic Gates 
       .    4 Bit binary Adder

      Expected Outcome:

      ·    Able to implement Full adder 
      .    Able to implement binary adder


      Book Chapter:

      ·   Chapter 4, Digital Logic Design –By  Morris Mano.
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      Sample project Idea URL
      Students must
      Mark as done

      Generate Your Project Idea 

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      Have Fun Interactive Content
      Students must
      Mark as done

      Self-Test

    • assign icon
      Lab report submission (copy) Assignment
      Opened: Saturday, 3 September 2022, 12:00 AM
      Due: Saturday, 10 September 2022, 12:00 AM
      Students must
      View
      Make a submission

  • Week 7: Mid Term Exam



  • Week 8: Decoder



    • Week 8: Decoder


      Topics for Week 8

      Lab Task 8

      ·    Design and Implementation of Decoder Circuits Using Logic Gates

      .    Half adder and Full adder from decoder

      Expected Outcome:

      ·    Able to implement Full adder from decoder
      .    Exercise on decoder


      Book Chapter:

      ·   Chapter 4, Digital Logic Design –By  Morris Mano.
    • assign icon
      Lab report submission Assignment
      Opened: Saturday, 3 September 2022, 12:00 AM
      Due: Saturday, 10 September 2022, 12:00 AM
      Students must
      View
      Make a submission

  • Week 9: Encoder



    • Week 9: Encoder

      Topics for Week 9

      Lab Task  9

      ·    Design and Implementation of a Encoder Using Basic Logic Gates

      Expected Outcome:
      .    Exercise on encoder


      Book Chapter:

      ·   Chapter 4, Digital Logic Design –By  Morris Mano.
    • assign icon
      Lab report submission Assignment
      Opened: Saturday, 10 September 2022, 12:00 AM
      Due: Friday, 16 September 2022, 12:00 AM
      Students must
      View
      Make a submission

  • Week 10: Assessment 2


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      Assignment 2
      Opened: Wednesday, 28 September 2022, 12:00 AM
      Due: Friday, 14 October 2022, 11:00 PM
      Students must
      Mark as done

      1. Find out one problem based on logic circuit

      2. Draw the circuit diagram

      3. Implement the circuit using online simulator

      4. Create a .pdf or .doc file to present whole work

      5. Upload the file only with 1 attempt (Check your file before final submission)

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      Discussion Forum
      Students must
      Mark as done

  • Week 11: Multiplexer



    • Week 11: Multiplexer

      Topics for Week 11

      Lab Task  11

      ·    Design and Implementation of Multiplexers

      .    Implement Multiplexer from boolean expression

      Expected Outcome:
      .    Able to implement Multiplexer


      Book Chapter:

      ·   Chapter 4, Digital Logic Design –By  Morris Mano.
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      Lab report submission Assignment
      Opened: Monday, 31 October 2022, 12:00 AM
      Due: Monday, 7 November 2022, 12:00 AM
      Students must
      View
      Make a submission

  • Week 12: SR Latch


    • Topics for Week 12

      Lab Task  12

      ·    Realization of SR Latch Using Integrated Circuit NAND and NOR Gates

      Expected Outcome:

      .    Able to implement sequential circuit


      Book Chapter:

      ·   Chapter 4, Digital Logic Design –By  Morris Mano.

  • Week 13: Lab Final


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      Submit Your Project Report Assignment
      Opened: Tuesday, 23 August 2022, 8:00 PM
      Due: Saturday, 29 October 2022, 8:00 PM
      Students must
      Mark as done

      Final Project Submission

      Project Idea and Report Writing: 

      1. Choose an  Idea for digital electronics lab (e.g. Idea1 )

      2. Accumulate all necessary information

      3. Implement your idea with Simulator (e.g.  Tinkercad.com)

      4. Use minimum 3 new elements to implement the circuit (That I did not present in class)

      5. Report Template-  * Project Title, * Description, *Equipment, *Circuit Diagram, *Advantages, *Disadvantages, *Project ScreenShot * Project Video link (Short)

      Project Submission Deadline: 16.12.2020 

      Before submission check your report again. 

      Best Wishes

  • Week 14: Final Exam